I. Installation
UTQUANT is freeware. Click here to download (You will need at least 15MB of free disk space to download and uncompress).
#define VERSION "3.0pre1"
/*#define PATH "/home/yyfan/usr/utquant_2.2/exec/"*/
/*#define PATH "/homes/linus/yyfan/utquant_2.2/exec/"*/
Change PATH name with your unity directory. For example, if your unity id is ikim2, the PATH name should be
#define PATH "/afs/unity.ncsu.edu/users/i/ikim2/utquant_3.0pre1a/exec/"
#define PATH
"/afs/unity.ncsu.edu/users/i/ikim2/utquant_3.0pre1a/exec/"
EPS_INS
= 5.5
insulator_thickness
= 6
MC_OX
= 0.35
MV_OX
= 0.35
VB_SIO2
= 1.0
EGOX
= 4.5
EPS_HIGHK
= 20.0
highk_thickness
= 33.6
MC_HK
= 0.35
MV_HK
= 0.35
VB_HK
= 1.45
EGHK
= 5.7
ins_type
? 0
rough_exp_elec
= 2.000
rough_exp_hole
= 1.000
gate_voltage
= 3.0
dVg
= 0.1
gate_material
= 3
variable_polydoping
? 0
poly_doping
= 6.000e+20
E_act_poly
= 0.5535
work_function
= 4.5
bulk_source_voltage
= 0.000
variable_subdoping
? 0
doping_conc
= -5e+15
E_act_sub
= -0.5763
strain
? 0
mole_fraction
= 0.000
CLASSICAL
? 0
Fermi_Dirac
? 1
Incomplete_Ionization
? 1
FAST
? 1
TUNNEL
? 1
WKB
? 3
MOMENTUM_RELAXED
= 0
FNTNL
? 0
IMAGE
? 0
dVg_tunnel
= 0.05
TL
= 300.00
currentForVti
= 4.000e-08
NFIX
= -0.0e12
const_Dit
? 1
Dit
= 0e+12
option
= 1
hidoping = 1
Please refer to the manual (can be found in the utquant_3.0pre1a/documents) Section II-1 and II-2 for detailed description of each line. Create input file with any editor and save it as *.input.
2. Running the simulation
To run the simulation of the input file you created, type “utuqnat *.input”. This will create several output files. For detailed description of each output files, please see Section II-3 of the manual
Note) in case
multiple simulations are needed, please move all the output files to other
directories. New simulation will create output files with the same names; thus
all old output files will be overwritten.
III.
References
[1]
S. Jallepalli, J. Bude, W.-K. Shih, M. R. Pinto, C. M. Maziar, and A. F. Tasch,
“Electron and hole quantization and their impact on deep submicron silicon p-
and n- MOSFET characteristics,” IEEE Trans. Elec. Dev., Vol. 44, pp. 297,
1997
[2]
S. Jallepalli, Ph.D. dissertatioin, The University of Texas at Austin,
1996
[3]
W.-K. Shih, X. Wang, S. Jallepalli, C. M. Maziar, and A. F. Tasch, “Modeling
gate leakage current in nMOS structures due to direct tunneling through
ultra-thin oxide,” ,1997
[4] G. Chindlore, S. A. Hareland, S. Jallepalli, A. F. Tasch, C. M. Maziar, V. K. F. Chia, and S. Smith, “Experimental determination of threshold voltage shifts due to quantum mechanical effects in MOS electron and hole inversion layers,” IEEE Elec. Dev. Lett., Vol. 18, 1997
[5] I. Kim, “Device Fabrication and Characterization for Alternative Gate Stack Devices, Chapter 2,” Ph.D. Dissertation, NCSU, 2003
[6] S.
Mudanai, Y. Fan, Q, Quyang, A.F. Tasch, S.K. Banerjee, “ Modeling of Direct
Tunneling Current Through Gate Dielectric Stacks,” IEEE Trans. Elec. Dev., Vol.
47, No. 10, p.1851, 2000
[7] Y. Fan, R.E. Nieh, J.C. Lee, G. Lucovsky, G.A.
Brown, L.F. Register, S.K. Banerjee, “Voltage and Temperature Dependent Gate
Capacitance and Current Model: Application to ZrO2 n-channel MOS Capacitor,”
IEEE Trans. Elec. Dev., Vol. 49, No. 11, p.1969, 2002